Resume of
Charles David "Dave" Johnson, PhD
E-mail address: cdavejohnson@att.net
Home page: http://charlesdavidjohnson.com
Education
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Ph.D.
Cognitive and Neural Systems
(September 1993 - May 1998)
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Boston University,
Boston, Massachusetts
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M.S.
Applied Mathematics
(March 1980 - December 1983)
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Santa Clara University,
Santa Clara, California
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B.S.
Engineering Physics
(August 1975 - May 1979)
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University of Illinois,
Urbana-Champaign, Illinois
Objective:
A position as Senior Scientist or Senior Engineer,
in which my PhD-level engineering and AI training may be utilized
effectively in long-range technological research and development.
Skills
- JPEG2000 standard, and its acceleration in hardware and software
- ASIC simulation environments (Axsys, CARDtools, Seamless CVE, VCPU)
- Image processing: resolution enhancement, halftoning, compression, etc.
- Strong programming in C/Linux/Unix: systems, applications, and libraries
- Real Time and embedded systems development under DSP/Bios, pSOS, and MTOS
- DSP algorithms for Telephony applications
- Voice and Fax over Internet (VoIP, FoIP) technologies
- C and Assembly on TI's TMS320C54x DSP fixed-point processor
- Wavelet methods and Digital Signal Processing (DSP)
- Speech Production, Perception, and Synthesis
- Neural Networks in AI, Speech, and Robotics applications
- Inverse Kinematic control of Redundant Articulatory Systems
- Adaptive Resonance Theory (ART), Backprop, RBFs, Function approximation
- C/UNIX Internationalization (I18N)
- Mentoring and teamwork skills
Employment History
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Senior Principal Staff Engineer/Scientist:
November 1999 - February 2003,
Motorola, Inc., Austin TX.
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Developed architectures and algorithms, and investigated technologies,
for the imaging market, including printers, scanners, digital cameras,
and cellular applications.
Our architectures utilized several CPUs, including Motorola's ColdFire 4,
ColdFire 5, PowerPC, and StarCore, and other CPUs such as ARM 9, ARM 11,
and Tensilica's Xtensa. As a team leader,
I made significant contributions in ASIC simulation by investigating and
implementing simulations of several subsets of full ASIC functionality,
using CARDtools, Agilent's SEEC, Instruction set simulators
for ColdFire and ARM (ARMulator), VCPU,
Seamless CVE, and other simulation tools.
My team developed and/or utilized C-models of a number of Motorola blocks,
including CPUs, DMAs, buses, memories, and specialized image processing blocks.
Some simulations interfaced to Verilog models of existing components.
These simulation environments were used to benchmark image processing speed,
OS overhead, and other performance parameters.
In addition to my simulation responsibilities,
I was also the JPEG2000 guru for our division.
I led a team to develop hardware accelerators for
the most computationally intensive components of JPEG2000, including the
DWT (discrete wavelet transform), CBM (coefficient bit modeler),
and AC (arithmetic coder). These blocks were developed in Verilog
and achieved a two-order-of-magnitude speed up over software approaches.
I also worked closely with potential JPEG2000 customers to
ensure that our blocks met their requirements.
I also researched various image processing technologies,
including halftoning and inverse halftoning,
RET (resolution enhancement technology), spline interpolation,
diagonalization of linear operators for improving speed,
transform-domain DSP techniques, and others.
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Corporate-wide visibility as team leader on a number of projects.
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ASIC software simulation environments.
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Expertise in JPEG2000 and JPEG, and their acceleration.
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Supervision and mentoring of interns (recent college grads).
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Technical marketing: presenting to customers and defining products.
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Technology investigations, patent and literature searches.
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Performance analysis: CPU idle time, bus utilization, memory utilization.
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Multimedia investigations.
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Product Developer:
February 1998 - October 1999,
e-Net Inc., Austin TX.
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Participated in all areas of DSP development for a Dual-DSP VoIP
(voice-over-Internet-Protocol) gateway board
product and a new Multi-DSP VoIP gateway board.
Developed C and assembly code for TMS320C54x TI DSP microprocessor,
using Code Composer IDE.
Utilized off-the-shelf vocoders (Lucent's implementation of G723.1 and
a Lucent proprietary 7.3kbps vocoder) in VoIP board products.
Debugged and maintained VoIP Jitter compensation algorithms.
Maintained interface to DTMF detection, DTMF generation, and
echo canceller algorithms.
Implemented inband signaling of DTMF digits in VoIP packet stream.
Debugged problems with DTMF detection sensitivity.
Ported VoIP multi-channel system to TI's DSP/Bios multi-tasking
real-time kernel.
Designed and implemented sockets-based application-level interface to
Multi-DSP board product under Solaris.
Participated in architectural design and implementation of Fax-over-IP (FoIP)
system.
Designed and implemented Fax detection algorithm using TI C54x DSP.
Maintained 10Base-T Ethernet interface utilizing National Semiconductor's
DP83902A ST-NIC peripheral.
Worked with call model application developers to define and maintain
interfaces to VoIP board products.
Acted as build coordinator and improved version control for all gateway
DSP software.
Recommended and purchased automated call generator test system.
Supervised entry-level programmer to develop diagnostic software.
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Participated in design of Voice-Over-IP (VoIP) gateway products.
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Participated in design of Fax-Over-IP (FoIP) gateway.
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Developed C and assembly code for TMS320C54x TI DSP microprocessor.
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PhD Student:
September 1993 - May 1998,
Department of Cognitive and Neural Systems,
Boston University, Boston MA.
- Collaborated with Professor Frank Guenther on research in speech
production and perception, and with Professor Stephen Grossberg on visual
perception of 2D and 3D images.
Participated in the development of a self-organizing motor control model of
speech production and perception which
utilizes conventional DSP and wavelet methods for the planning of real-time
speech articulator movements.
Designed, developed, and maintained C/UNIX programs for the extensive
computer simulations of the speech model, using Motif and
Xlib. Development was done under SunOS 4.1.
Coauthored several publications which describe this model and
presented this model at several conferences. Research
collaborations also included work on application of wavelets and
wavelet methods to our understanding of visual perception and image
processing.
Research included extensive work on neural network modeling, adaptive
learning and self-organization, pattern classification and recognition, and
industry-standard neural network architectures.
Dissertation proposed a wavelet-based multiscale model of speech
articulatory control for vowel and consonant production.
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Defended my thesis: "Investigations of Formant and Wavelet Representations for
Speech Movement Planning"
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Developed a self-organizing biologically-plausible model of speech production.
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Designed and implemented speech model simulations in C/UNIX
(with Motif and Xlib).
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Taught course on computational modeling of biological neural systems.
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Consultant:
July 1992 - April 1993,
Tivoli Systems, Inc., Austin TX.
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Responsible for all internationalization (I18N) of Tivoli's TME
product line,
and participated in the port of TME
from SunOS 4.1 to SVR4.
All development was done with C/UNIX under SunOS 4.1 and SVR4.
Interfaced with developers across the company and
with outside software vendors, including OSF. Developed and
taught an in-house course on internationalization of software, and wrote
an extensive Internationalization
Tutorial which is now available on the WWW.
Tivoli developed
TME (Tivoli Management Environment), a Motif-based, object-oriented
software product to simplify system administration functions.
Tivoli Systems, Inc. went public on March 10, 1995.
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Responsible for all
internationalization
of Tivoli software.
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Participated in the port of Tivoli products from SunOS 4.1 to SVR4.
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Consultant:
March 1991 - July 1992,
Interactive Systems Corp (ISC), Austin TX.
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Provided
internationalization
support to ISC for IBM's
AIX 3.1 commands and libraries and wrote test cases for
AIX 3.2 security features. Taught a course on software internationalization
for ISC developers.
ISC provided consulting services to several companies, including IBM.
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Provided internationalization support to
ISC for IBM's AIX 3.1 commands and libraries.
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Taught a course on software internationalization for ISC developers.
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Consultant:
January 1989 - August 1990,
IBM, Austin TX.
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Member of the team that developed AIX 3.1, a version of Unix for
IBM's new superscalar RISC processor, the RS/6000.
Developed C library functions and applications for AIX 3.1
internationalization
support. All software was written in C.
In addition to designing, coding, and testing many C library
functions, I ensured POSIX, ANSI-C, and X/Open conformance. Liaison to
the team of translators brought in from around the world to translate help and
error messages for the commands and library functions.
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Participated in development of AIX 3.1
internationalization support for the RS/6000.
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Ensured POSIX, ANSI-C, and X/Open conformance of commands and libraries.
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Consultant:
November 1987 - July 1988,
Nova Graphics International, Austin TX.
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Successfully ported all Nova Graphics CGI
(Computer Graphics Interface) software
products to a 68000-based
rasterizer running the pSOS real-time operating system. All code was written
in C.
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Ported Sun-based graphics software to a dedicated rasterizer running pSOS.
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Project Engineer:
February 1984 - November 1987,
Schlumberger Well Services, Austin TX.
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Member of the team that developed a real-time operating system
kernel for a commercial oil and gas measurement system.
Cross development was done on a VAX-11/780 cluster running under the VMS
operating system. Wrote numerous kernel functions including all system
support for dynamic memory allocation.
Participated in all levels of system design.
The real-time kernel and applications ran on a PDP-11/34 and were written
entirely in MACRO-11 (PDP-11 assembly language).
Wrote several development tools in FORTRAN 77.
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Participated in the development of a real-time kernel.
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Wrote numerous kernel functions, including memory allocation,
in PDP-11 assembler.
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Firmware Programmer:
October 1981 - February 1984,
Benson, Inc., Mountain View, CA.
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Developed plotter interface drivers (under the DEC operating systems
RSX-11/M and RT-11)
and test software, all in PDP-11 assembly language.
Also developed real-time rasterizer firmware for a Motorola 68000-based
rasterizer controller written in 68000 assembly language running under
IPI's MTOS, a multi-tasking operating
system. Participated in hardware debugging
with a logic analyzer and HP64000 in-circuit emulator.
Cross development was done on a VAX-11/780 under VMS.
Benson, Inc., was acquired by Schlumberger LTD.
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Developed printer/plotter device drivers in PDP-11 assembly language.
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Developed rasterizer firmware in 68000 assembly language under MTOS.
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R&D Test Engineer:
May 1979 - October 1981,
Hewlett Packard Co.,
Microwave Semiconductor Div.,
San Jose, CA.
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Responsible for the development of automated test systems for device
and circuit characterization for a silicon bipolar microwave (1-4 GHz)
R&D lab. These test systems measured noise figure, power gain compression,
S parameters, and DC parameters.
Test programs were written in HP-BASIC and ran on the HP-9845 desktop
computer. The instrument bus was the HP-IB, a
predecessor of the standard IEEE-488 bus.
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Developed automated systems to measure microwave and DC circuit parameters.
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Responsible for R&D lab circuit characterization and product data sheets.
Published and Unpublished Writings
- Journal Papers
- Frank H. Guenther, Michelle Hampson, and Dave Johnson (1998),
A theoretical investigation of reference frames for the planning of
speech movements.
Psychological Review. 105(4), 611-633.
(PDF, 322KB)
- Conferences
- Dave Johnson (1997). A wavelet-based auditory planning
space for production of vowel sounds.
Proceedings
of the Conference on Vision, Recognition, Action: Neural
Models of Mind and Machine. May 29-31, 1997. Boston, MA:
Boston University. 106,
(HTML abstract)
.
- Frank H. Guenther and Dave Johnson (1995),
A computational model using formant space planning of articulator movements
for vowel production.
Journal of the Acoustical Society of America, 97(5), 3402.
(HTML abstract)
- Dave Johnson and Frank H. Guenther (1995),
Acoustic space movement planning in a neural model of motor equivalent
vowel production.
Proceedings of the World Congress on Neural Networks,
Washington, D.C.,
Vol 1, 481-484,
Mahwah, NJ: Lawrence Erlbaum Associates, Inc., Publishers.
(PDF, 20KB)
- Dissertation
- Charles David Johnson (1998),
Investigations of Formant and Wavelet Representations for Speech Movement
Planning, Boston University, Department of Cognitive and Neural Systems,
Unpublished dissertation.
(HTML abstract)
,
(PDF, 982KB)
- Published Technical Reports
- Frank H. Guenther, Michelle Hampson, and Dave Johnson (1997),
A theoretical investigation of reference frames for the planning of
speech movements. (Technical Report CAS/CNS-TR-97-002). Boston:
Boston University, Center for Adaptive Systems.
- Unpublished Reports
- Dave Johnson (1995),
Early Language Acquisition in Humans: A Review of the Babbling Literature,
Boston University,
Department of Cognitive and Neural Systems,
(HTML),
(PDF, 179KB)
.
- Dave Johnson (1995),
Production of Realistic Vowel Sounds Using a Neural Network Model of
Speech Production and Acquisition,
Boston University,
Department of Cognitive and Neural Systems,
(PDF, 276KB)
.
- Dave Johnson (1994),
Depth and Subjective Transparency: A survey of the literature,
Boston University,
Department of Cognitive and Neural Systems,
(HTML)
.
Society Membership
Personal Data
Born at Fort Riley, Kansas, on April 30th, 1957. Grew up in Kansas, Indiana,
Iowa, Kentucky, and Illinois. Worked in California and Texas before
returning to graduate school in Boston.